1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device including an indium phosphide (InP)-based device layer.
2. Description of the Related Art
Electronic devices such as high electron mobility transistor (HEMTs) and heterojunction bipolar transistors (HBTs) formed on InP substrates, and light-emitting/receiving devices such as light emitting diodes (LEDs), laser diode (LDs) and photo diodes (PDs) formed on InP substrates are expected as next-generation high-performance key devices for wireless and optical communications.
However, one of major issues to be solved to achieve the devices is the high cost of InP substrates. Compared to gallium arsenide (GaAs) substrates, the cost of materials of the InP substrates are high, and it is difficult to form the InP substrates, so the InP substrates are 3 to 10 times more expensive than the gallium arsenide substrates. Moreover, at present, a demand for larger-diameter InP substrates is poor, so substrates with a diameter of 150 mm (6 inches) have not yet commercialized. Therefore, there is an issue that compared to the case where the devices are formed on 150-mm diameter GaAs substrates, substrate cost makes up a large proportion of chip cost.
To solve the issue, there is proposed a metamorphic technique using low-cost large-diameter GaAs substrates. In this technique, it is necessary to grow a metamorphic buffer layer which confines defects caused by a lattice mismatch on a GaAs substrate.
However, in the case where an attempt to achieve lower defect density is made to enhance the performance of the device, the thickness of the metamorphic buffer layer is increased, and in some cases, the thickness of the metamorphic buffer layer becomes a few μm or over. The increased thickness of the metamorphic buffer layer may cause not only an increase in cost of crystal growth but also current leakages or stray capacity. In particular, in the case where the metamorphic technique is attempted to be applied to a bipolar device which is more susceptible to defects or heat generation than a unipolar device, the above-described issue constitutes a big barrier to commercialization. Therefore, a technique for forming the device on the InP substrate at low cost is necessary.
On the other hand, to reduce the cost of the device formed on the GaAs substrate, an epitaxial liftoff (ELO) technique which uses an aluminum arsenide (AlAs) layer as a sacrificial layer has been studied. In the ELO technique, a substrate and a device layer formed by epitaxial growth are separated from each other, and the substrate is reused, thereby substrate cost may be remarkably reduced. An example in which an AlAs layer is used for the device on the InP substrate has been also reported.
However, the generation of high-density defects caused by a lattice mismatch between the InP substrate and the AlAs layer causes deterioration of electrical characteristics, so a practical device has not yet been achieved.
Moreover, as described in, for example, Japanese Unexamined Patent Application Publication No. S61-110470, it has been reported that in an InP homostructure solar cell, at least one kind selected from the group consisting of indium gallium arsenide (InGaAs), indium aluminum arsenide (InAlAs), indium gallium aluminum arsenide (InGaAlAs), indium aluminum arsenide phosphide (InAlAsP) and indium gallium arsenide phosphide (InGaAsP) is used as a sacrificial layer.